I am using the STM8S103F3P6(Product details:
https://www.electronic-components.hk/product-detail/0b7/STM8S103F3P6.html) internal 8M crystal, step 1hz~1KHz frequency
Void TIME1_INIT(void)
{
PC_DDR&=~(1<<3); //PD3 input mode
PC_CR1|= 1<<3; //PD3, pull up
PC_CR2&=~(1<<3); //PD3, no interrupts are used
TIM1_DeInit();
// TIM1_TimeBaseInit(800, TIM1_COUNTERMODE_DOWN, 20000, 0);
//CC3 channel is configured as input, IC3 is mapped on TI3FP3 11: Capture is triggered every 8 events No filter, f SAMPLING =f MASTER
TIM1_ICInit ( 0x00, 0x01, 0x0C, 0x0); / / channel 3 rising edge
TIM1_CCR3H=0;
TIM1_CCR3L=0;
TIM1_ITConfig(TIM1_IT_CC3, ENABLE);
TIM1_ClearFlag(TIM1_FLAG_CC3);
TIM1_Cmd(ENABLE);
// TIM1_CCMR3 = 0x0d;
// TIM1_CCER2 = 0x01;
// TIM1_IRE = 0x08;
// TIM1_CR1 = 0x01;
}
//interrupt
#pragma vector=TIM1_CAPCOM_CC3IF_vector
__interrupt void TIM1_CAP_COM_IRQHandler(void)
{
If(TIM1_GetITStatus(TIM1_FLAG_CC3) != RESET)
{
Switch(Icp_Status)
{
Case 0: ICValue1=TIM1_GetCapture3(); //The first time the rising edge is captured
Icp_Status=1;
Break;
Case 1: ICValue2=TIM1_GetCapture3();
Icp_Status=2;
Break;
Default:
TIM1_CCxCmd( DISABLE);
TIM1_ITConfig(TIM1_IT_CC3, DISABLE);
Icp_Status=3;
Break;
}
TIM1_SR1 = (uint8_t)(~(uint8_t)TIM1_IT_CC3);
TIM1_ClearFlag(TIM1_FLAG_CC3);
}
}
/ / main function
While(1)
{
If( Icp_Status == 3)
{
Icp_Status = 0;
If(ICValue2 > ICValue1)ICp_Vaule = ICValue2-ICValue1;
Else if(ICValue2<ICValue1) ICp_Vaule = 0xffff + ICValue2 - ICValue1;
TIM1_CCxCmd(ENABLE);
TIM1_ITConfig(TIM1_IT_CC3, ENABLE);
TIM1_CCR3H=0;
TIM1_CCR3L=0;
}
Now the difference is 84000 for the 8ms cycle of 125HZ. This value is completely out of line with this frequency, and I would like to ask, what is the relationship between this value and frequency?