sdhci O2 Micro pio x86_64

quant (78)
Hello evrybody!
A few about that.
I have next truble using controller sdhci on x86_64 arch linux kernel 2.6.26 and older versions.
07:02.2 Generic system peripheral [0805]: O2 Micro, Inc. Integrated MMC/SD Controller (rev 01) 
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sdhci [sdhci_transfer_pio()]: PIO transfer complete.
sdhci [sdhci_irq()]: *** mmc0 got interrupt: 0x00000022
sdhci [sdhci_irq()]: *** mmc0 got interrupt: 0x00000003
mmc0: req done (CMD18): 0: 00000900 00000000 00000000 00000000
mmc0:     65536 bytes transferred: 0
mmc0:     (CMD12): 0: 00000b00 00000000 00000000 00000000
mmc0: starting CMD18 arg 138b1e00 flags 000000b5
mmc0:     blksz 512 blocks 128 flags 00000200 tsac 100 ms nsac 0
mmc0:     CMD12 arg 00000000 flags 0000049d
sdhci [sdhci_irq()]: *** mmc0 got interrupt: 0x00000001
sdhci [sdhci_irq()]: *** mmc0 got interrupt: 0x00000020
sdhci [sdhci_read_block_pio()]: PIO reading
sdhci [sdhci_read_block_pio()]: PIO reading

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07:02.2 Generic system peripheral [0805]: O2 Micro, Inc. Integrated MMC/SD Controller (rev 01)
        Subsystem: Mitac Unknown device 8258
        Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort- >SERR- <PERR-
        Interrupt: pin A routed to IRQ 16
        Region 0: Memory at 64004800 (32-bit, non-prefetchable) [size=256]
        Capabilities: [a0] Power Management version 2
                Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
                Status: D0 PME-Enable- DSel=0 DScale=0 PME-

07:02.3 Mass storage controller: O2 Micro, Inc. Integrated MS/xD Controller (rev 01)
        Subsystem: Mitac Unknown device 8258
        Control: I/O- Mem+ BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
        Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=slow >TAbort- <TAbort- <MAbort- >SERR- <PERR-
        Interrupt: pin A routed to IRQ 11
        Region 0: Memory at 64001000 (32-bit, non-prefetchable) [size=4K]
        Capabilities: [a0] Power Management version 2
                Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
                Status: D0 PME-Enable- DSel=0 DScale=0 PME-


kernel config listen below..
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CONFIG_MMC=y
CONFIG_MMC_DEBUG=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_BOUNCE=y
CONFIG_MMC_SDHCI=y


I read next comments into ./drivers/mmc/host/sdhci.c source.
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/* Controller has an unusable DMA engine */
#define SDHCI_QUIRK_BROKEN_DMA                          (1<<5)
/* Controller can only DMA from 32-bit aligned addresses */
#define SDHCI_QUIRK_32BIT_DMA_ADDR                      (1<<6)


http://www.mjmwired.net/kernel/Documentation/DMA-mapping.txt
scenario is a 64-bit capable device. The approach here is to try for 64-bit DAC addressing

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156		int using_dac;
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158		if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)) {
159			using_dac = 1;
160		} else if (!pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
161			using_dac = 0;


And have one question about this. Does is the volumes (1<<6) and (1<<5) equivalent for any arch, doen not equals?
exception (323)
Well, english isn't my mother tongue either, so I certainly can understand possible difficulties you might have. However, as much as I would like to help, I honestly don't understand your question.

Does is the volumes (1<<6) and (1<<5) equivalent for any arch, doen not equals?
quant (78)
Sorry, I very wanted to sleep in then. I'm keep in mind #define in 32BIT equals 64BIT, or not equals?
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