Compile .cc and .cpp files using single command in makefile

[anjalir]

hello, I want to include .cc files in an existing embedded c++ SDK.

There is a rule in the Makefile which says:

$(OBJFILE):%.o:%.cpp
$(CXX) -v -c -o $@ $< $(INCPATHS) $(CXXFLAGS) -pipe -g -Wall

Which shows dependency on .cpp files. However I want to add my .cc files in SOURCES. I tried tweaking around with following changes:

1) If I replace %.o:%.cpp with $(SOURCE) and add my files in $(SOURCE), I get multiple-definitions error.
2) Also, I don't understand why the dependency is %.o:%.cpp and why not just %.cpp. If I replace it that way, it just doesn't compile

Apologies for basic questions, I still don't have a good hand over c++ and linux in general

[kbw]

Instead of replacing, why not just add a duplicate rule for .cc?

[mbozzi]

1. Yes, because every object file would be produced from the first source file in the expansion of ${SOURCES} and then linked together.

2. $(OBJFILE):%.o:%.cpp is a static pattern rule.
A static pattern rule says that any given object file in ${OBJFILE} depends on the corresponding .cpp file. ${OBJFILE} presumably expands to a list of object files in the form alpha.o beta.o gamma.o.

@kbw's solution would get you there, except that static pattern rules must match all of their targets. It's unclear why a static pattern rule is required from this context, but it may be required; a dynamic pattern rule would allow the creation of a duplicate rule for .cc with no issue.

The most localized solution I can think of that retains static pattern rules involves adding the corresponding object files to OBJFILE:
OBJFILE+=${patsubst %,%.o,${wildcard *.cc}}
And creating intermediate .cpp files from those .cc files:

.INTERMEDIATE: ${patsubst %.cc,%.cpp,${wildcard *.cc}}
${patsubst %.cc,%.cpp,${wildcard *.cc}}:%.cpp:%.cc
    -cp $< $@

[kbw]

That's because you have a series of non-standard rules.

[mbozzi]

Sorry to ask such a question, but what are you referring to?
I assumed since OP was invoking G++ that GNU make was being used. I'm not really familiar with the POSIX subset.

[kbw]

GNU Make has a whole bunch of built in rules. You can see them if you run "make -p".

For example, create a hello.cpp that contains a program and run "make -d hello" without a makefile to see what it actually goes thru to build a program.

The idea is to use the built in rules as far as possible, and minimize customization. That's not what customization is for. Customization really should be put into a library for use across different projects of the same type.

[benhart]

You can run make -p and see a detailed rules. I also recommend a good detection of errors which is important in c++. If your'e having troubles doing that yourself you can try using a program for that. I tend to use checkmarx.
Anyway, good luck!
Ben.