RAM En. -- RAM Enable
"Controls system access to the display buffer.
= 0 disables address decode for the display buffer from the system
= 1 enables address decode for the display buffer from the system"
What happens when the CPU writes or reads data to a memory mapped I/O device (MMIO) while the device has it's decoding disabled (in the case of the VGA, set this bit to 0)?
- Is the write or read redirected to main memory (RAM)?
- Are writes ignored and reads give 0xFF or 0x00?
When more than 640K memory is installed, how is the memory between 640K-1MB memory mapped?
When I access 0xA0000, do I access physical memory address 0xA0000 or 1MB+ or nothing?
When I access 1MB+, do I access physical memory address 1MB+ or 0xA0000+?