What happens when the keyboard and the mouse have data ready to be received at the same time? Which one does the controller choose? (See bit 1&5 on the status port (0x64) and the data port (0x60))
oh so you mean when the keyboard and mouse send data not recieve it (that makes much more sense). like i said, i dont think they are getting sent on the same cycle so its not an issue.
So the order in which i give data from the keyboard and the mouse at the same time, doesn't matter? Or must i give the keyboard higher priority, so that IRQ1 cannot go wrong? (Since it always expects keyboard data)
Is this the kind of thing you're asking about? This kind of stuff hasn't been a concern on PC's for a few decades. When or if this happens a hardware exception is thrown, the kernel catches it, and offsets one of the requests to be the next one processed. Like Duoas said, this happens so fast that you'll never see it. If you're building your own PIC's however that's another story, how this issue is dealt with is platform dependant.
I'm currently working on emulating an 80(1)86 on a PSP (333 or 222MHz ARM CPU). Almost everything is working and implemented, only got the VGA, Keyboard/Mouse/PS/2 Controller and some little bugs in the CPU left. Currently have given keyboard input priority over mouse input, when there's both, to prevent IRQ1/12 Conflicts (both keyboard and mouse get input of port 0x60). Is this OK?