I've been searching for days and reading about using makefiles on linux and I cannot, for the life of me, get it to work correctly.
Let's say I have three files: Finances.cpp Parse.cpp and Parse.h
Finances.cpp has several calls to a function named parse whose definition is in Parse.cpp. Finances.cpp includes Parse.h which contains the prototype of the function named parse.
I know this is not correct, but this is one of the millions of variations I have tried. What's odd is that if I were to replace the prototype in Parse.h with the definition from Parse.cpp, it works perfectly fine.
I keep getting undefined reference to 'main' or 'parse' errors.
Could someone please point me in the right direction?
If it helps, my OS is Ubuntu 12.04 LTS (Precise Pangolin) 32-bit, my IDE is Eclipse, and my compiler is g++ 4.6.3 (I think?)
CXXFLAGS = -O2 -g -Wall
#Compile every unit.
OBJS = Finances.o Parse.o
LIBS =
TARGET = Finances
#The definitions are in the object files. The application depends on them
Finances: $(OBJS)
$(CXX) $(CXXFLAGS) -o Finances $(OBJS)
#Don't depend on others cpp. That's the idea.
#Put you need to recompile if an included header changes.
Finances.o: Finances.cpp Parse.h
$(CXX) -c Finances.cpp
#Ditto for the other objects
Parse.o: Parse.cpp Parse.h
$(CXX) -c Parse.cpp
all: Finances
clean:
rm -f $(OBJS) $(TARGET)
The makefile will mimic what you do in the command line
By instance you could link all the sources with
Thanks a lot. At first, your suggestion still threw an undefined reference to 'parse' error, but then I removed the inline from the function prototype and definition then built again with success. I suspect I tried your suggestion before and the inline was the problem all along. But thanks again for the help.