Makefile not working.

[kingpoop]

I have a Make file listed below with a folder names include that has a single .h file, but the Makefile cannot find it and i am stumped. Can anyone shed some light on what i am doing wrong?

Here is the error after executing make:
--------------------------------------
g++ -c -o Test_Assignment1.o Test_Assignment1.cpp
Test_Assignment1.cpp:7:10: fatal error: customErrorClass.h: No such file or directory
#include "customErrorClass.h"
^~~~~~~~~~~~~~~~~~~~


Here is the folder contents:
----------------------------
include <--folder that contains customErrorClass.h
customErrorClass.cpp
input.dat
Test_Assignment1.cpp
Makefile

Contents of the Makefile:
------------------------

CC := g++
INCLUDE_DIRS := ./include
CFLAGS := -I$(INCLUDE_DIRS)
DEPS := ${INCLUDE_DIRS}/customErrorClass.h
SRC := $(wildcard *.cpp)
OBJ := $(SRC:.cpp=.o)

Test_CodeChallengeOne: $(OBJ)
	$(CC) -o $@ $^ $(CFLAGS)

customerErrorClass.o: customerErrorClass.cpp ${DEPS}
	$(CC) -c -o $@ $(CFLAGS) $<

.PHONY: clean

clean:
	rm -f $(OBJ) Test_CodeChallengeOne

[dutch]

You have no rule for Test_Assignment1.o so it's being built with a default rule.

Also, CC should be CXX and CFLAGS should be CXXFLAGS.

[kingpoop]

I added a rule for Jones_Assignment1, but it still fails as follows:
$ make
g++ -c -o customErrorClass.o customErrorClass.cpp
customErrorClass.cpp:2:10: fatal error: customErrorClass.h: No such file or directory
#include "customErrorClass.h"
^~~~~~~~~~~~~~~~~~~~


CC := g++
INCLUDE_DIRS := ./include
CFLAGS := -I$(INCLUDE_DIRS)
DEPS := ${INCLUDE_DIRS}/customErrorClass.h
SRC := $(wildcard *.cpp)
OBJ := $(SRC:.cpp=.o)

Jones_CodeChallengeOne: $(OBJ)
$(CC) -o $@ $^ $(CFLAGS)

Jones_Assignment1.o: Jones_Assignment1.cpp ${DEPS}
$(CC) -c -o $@ $(CFLAGS) $<

customerErrorClass.o: customerErrorClass.cpp ${DEPS}
$(CC) -c -o $@ $(CFLAGS) $<

.PHONY: clean

clean:
rm -f $(OBJ) Jones_CodeChallengeOne

[dutch]

Try this:

CXX := g++
INCLUDE_DIRS := ./include
CXXFLAGS := -Wall -I$(INCLUDE_DIRS)
DEPS := $(wildcard $(INCLUDE_DIRS)/*.h)
SRCS := $(wildcard *.cpp)
OBJS := $(SRCS:.cpp=.o)
TARGET := Test_CodeChallengeOne

$(TARGET): $(OBJS)
	$(CXX) -o $@ $^

$(OBJS): $(DEPS)

.PHONY: clean
clean:
	$(RM) $(OBJS) $(TARGET)

[kingpoop]

dutch - thank you, it worked.

so where did i trip up?

[dutch]

so where did i trip up?

I don't know. It looks like your last attempt should've worked.

My version is more automatic, though, so perhaps it's better.
But I'm no makefile expert!

[doug4]

I wouldn't call myself a makefile expert--nobody wants to admit to that, but I probably am one. When you are known as a makefile expert, people tend to come to you with makefile problems because they don't want to learn how to use them. And I don't blame them.

Nobody really likes makefiles. People learn just enough to create one and then copy it from project to project and never think about it again.

@dutch's makefile is pretty good. The only non-trivial thing I see in it that I would change is the DEPS value. In this makefile, all source files will be recompiled when any header file changes. For small toy projects and homework assignments, that's fine. However, in a large production, this could lead to huge wastes of time.

Better would be to dynamically calculate the dependencies when compiling the source code. Roughly, you need to add something similar to the following

DEPDIR := dep
DEPS = $(SRCS:%.cpp=$(DEPDIR)/%.dep)

$%.o : %.cpp
	mkdir -p $(DEPDIR)
	$(CXX) $(CXXFLAGS) -MMD -MF $(DEPDIR)/$(*F).dep -o $@ $<


-include $(DEPS)

Note: This is copied from one of my projects where things are in different directories, so things might have been messed up a bit in the simplification. (You could do it without the DEPDIR, but then all of your dependency files would end up in the directory with the source and object files.)

The important things are the -MMD and -MF flags to the compiler which tell it to generate dependency files. Then the -include line AT THE END OF THE MAKEFILE telling make to include these files if they exist.

It's worth knowing that these options exist so when you get involved in large projects where you don't want to recompile everything for a minor header change, you can improve your makefiles to avoid the issues.

[dutch]

Thanks doug. I'll look into those -M options.
You're right that the way I handled the dependencies is potentially very inefficient!
Good to know there's a makefile expert around. :-)

[doug4]

Don't call me that! ;)

[kingpoop]

Thank you for all your help.

If you have any references on makefile for noobs I would appreciate the links. I am studying a couple of books and still it's confusing.

Thanks,