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#include <iostream>
#include <fstream>
#include <cmath>
#include <math.h>
#include <tgmath.h>
#include <sstream>
#include <stdlib.h>
#include <string>
#include "BaseCache.h"
using namespace std;
BaseCache::BaseCache(uint32_t _cacheSize, uint32_t _associativity, uint32_t _blockSize) {
setCacheSize(_cacheSize);
setAssociativity(_associativity);
setBlockSize(_blockSize);
numSets = cacheSize/(blockSize*associativity);
createCache();
resetStats();
}
void BaseCache::setCacheSize(uint32_t _cacheSize) {
cacheSize = _cacheSize;
}
void BaseCache::setAssociativity(uint32_t _associativity) {
associativity = _associativity;
}
void BaseCache::setBlockSize(uint32_t _blockSize) {
blockSize = _blockSize;
}
uint32_t BaseCache::getCacheSize() {
return cacheSize;}
uint32_t BaseCache::getAssociativity() {
return associativity;}
uint32_t BaseCache::getBlockSize() {
return blockSize;}
uint32_t BaseCache::getReadHits() {
return numReadHits;}
uint32_t BaseCache::getReadMisses() {
return numReadMisses;}
uint32_t BaseCache::getWriteHits() {
return numWriteHits;}
uint32_t BaseCache::getWriteMisses() {
return numWriteMisses;}
double BaseCache::getReadHitRate() {
double numReadMisses = getReadMisses();
double numReadHits = getReadHits();
double ReadHitRate = numReadHits/(numReadHits+numReadMisses)*100;
return ReadHitRate;}
double BaseCache::getReadMissRate() {
double numReadMisses = getReadMisses();
double numReadHits = getReadHits();
double ReadMissRate = numReadMisses/(numReadHits+numReadMisses)*100;
return ReadMissRate;}
double BaseCache::getWriteHitRate() {
double numWriteMisses = getWriteMisses();
double numWriteHits = getWriteHits();
double WriteHitRate = numWriteHits/(numWriteHits+numWriteMisses)*100;
return WriteHitRate;}
double BaseCache::getWriteMissRate() {
double numWriteMisses = getWriteMisses();
double numWriteHits = getWriteHits();
double WriteMissRate = numWriteMisses/(numWriteHits+numWriteMisses)*100;
return WriteMissRate;}
double BaseCache::getOverallHitRate() {
double numReadMisses = getReadMisses();
double numReadHits = getReadHits();
double numWriteMisses = getWriteMisses();
double numWriteHits = getWriteHits();
double OverallHitRate = (numReadHits+numWriteHits)/(numReadMisses+numReadHits+numWriteMisses+numWriteHits)*100;
return OverallHitRate;}
double BaseCache::getOverallMissRate() {
double numReadMisses = getReadMisses();
double numReadHits = getReadHits();
double numWriteMisses = getWriteMisses();
double numWriteHits = getWriteHits();
double OverallMissRate = (numReadMisses+numWriteMisses)/(numReadMisses+numReadHits+numWriteMisses+numWriteHits)*100;
return OverallMissRate;}
void BaseCache::initDerivedParams() {
numSets = cacheSize/(blockSize*associativity);
}
void BaseCache::resetStats() {
BaseCache::numReads = 0;
BaseCache::numWrites = 0;
BaseCache::numReadHits = 0;
BaseCache::numReadMisses = 0;
BaseCache::numWriteHits = 0;
BaseCache::numWriteMisses = 0;
}
//WRITE ME
//Create cache and clear it
void BaseCache::createCache()
{
associativity = getAssociativity();
blockSize = getBlockSize();
cacheSize = getCacheSize();
numSets = cacheSize/(blockSize*associativity);
cacheLines = new cacheLine*[associativity*blockSize];
for(uint32_t i = 0; i < numSets; i++)
{
cacheLines[i] = new cacheLine[numSets];
}
uint32_t zero = 0;
uint32_t* p = &zero;
for(uint32_t i = 0; i < numSets; i++)
{
for(uint32_t j = 0; j < numSets; j++)
{
cacheLines[i][j].data = p;
cacheLines[i][j].LRUStackBits = 0;
cacheLines[i][j].tag = 0;
}
}
}
bool BaseCache::read(uint32_t addr, uint32_t *data) {
numReads++;
uint32_t byteInt = addr % blockSize;
uint32_t blockInt = ((addr-byteInt)/blockSize) % associativity;
uint32_t setInt = ((addr-byteInt-blockInt)/(blockSize*associativity)) % numSets;
uint32_t tagInt = ((addr-byteInt-blockInt-setInt)/cacheSize);
numReadHits++;
return 1;
}
bool BaseCache::write(uint32_t addr, uint32_t data) {
numWrites++;
uint32_t byteInt = addr % blockSize;
uint32_t blockInt = ((addr-byteInt)/blockSize) % associativity;
uint32_t setInt = ((addr-byteInt-blockInt)/(blockSize*associativity)) % numSets;
uint32_t tagInt = ((addr-byteInt-blockInt-setInt)/cacheSize);
if(tagInt != cacheLines[setInt][blockInt*blockSize+byteInt].tag){
numWriteMisses++;
uint32_t start_location = blockInt*blockSize-byteInt;
for(uint32_t i = 0; i < 4; i++){
cacheLines[setInt][blockInt*blockSize+byteInt].data == data;
}
cout << start_location << endl;
return 0;
}
numWriteHits++;
return 1;
}
BaseCache::~BaseCache() {
delete cacheLines;
}
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#include <iostream>
#include <fstream>
#include <sstream>
#include <string>
#include "BaseCache.h"
using namespace std;
int main(int argc, char **argv)
{
string inp_line, parsed_line;
string command;
unsigned int address, data;
uint32_t cacheSize, associativity, blockSize;
cacheSize = atoi(argv[1]);
associativity = atoi(argv[2]);
blockSize = atoi(argv[3]);
ifstream fp_inp(argv[4]);
BaseCache BaseCache(cacheSize, associativity, blockSize);
if(fp_inp.is_open()) {
while(getline(fp_inp, inp_line)) {
stringstream inp_string(inp_line);
cout << cacheSize << endl;
if(getline(inp_string,parsed_line, ' '))
command = parsed_line;
if(getline(inp_string,parsed_line, ' '))
address = stoul(parsed_line, NULL, 16);
if (!(command.compare("w"))) {
if(getline(inp_string,parsed_line, ' ')) {
data = stoul(parsed_line, NULL, 16);
}
}
// Issue read/write command as per the input trace.
if (!(command.compare("w"))) {
if(BaseCache.write(address, data)) {
cout <<"Write Hit : addr:0x"<<hex<<address;
cout <<" data: 0x"<<hex<<data<<"\n";
}
else {
cout <<"Write miss: addr:0x"<<hex<<address;
cout <<" data: 0x"<<hex<<data<<"\n";
}
}
if (!(command.compare("r"))) {
if(BaseCache.read(address, &data)) {
cout <<"Read Hit : addr:0x"<<hex<<address;
cout <<" data: 0x"<<hex<<data<<endl;
}
else {
cout <<"Read miss : addr:0x"<<hex<<address;
cout <<" data: Unavailable"<<endl;
}
}
}
fp_inp.close();
}
return 1;
}
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